Consider a cache uses a direct mapping scheme. The size of main memory is 4 K bytes and word size of cache is 2 bytes.The size of cache memory is 128 bytes. Find the following : i. The size of main memory address (assume each byte of main memory has an address) ii. Address of cache block iii. How many memory location address will be translated to cache address/block/location ? iv. How can it be determined if the content of specified main memory address in cache ?

A computer uses a memory unit with 256 K words of 32 bits each. A binary instruction code is stored in one word of memory. The instruction has four parts : an indirect bit, an operation code, a register code part to specific one of 64 register and an address part. i. How many bits are there in the operation code, the register code part and the address part ? ii. Draw the instruction word format and indicate the number of bits in each part. iii. How many bits are there in the data and address inputs of the memory ?