i. Interleaved memory :
1.Interleaved memory is a design made to compensate for the relatively slow speed of Dynamic Random Access Memory (DRAM).
2.This is done by spreading memory addresses evenly across memory banks.
3.Thus, in contiguous memory, reads and writes are done using each memory bank in turn, resulting in higher memory throughputs due to reduced waiting for memory banks to become ready for desired operations.
4.As shown in image the lower order k bits of the address are used to select the module (Memory bank) and higher order m bits
give a unique memory location in the memory bank that is selected by the lower order k bits.
5.Thus in this way consecutive memory locations are stored on different memory banks.
6.Whenever requests to access consecutive memory locations are being made several memory banks are kept busy at any point in
time.
7.This results in faster access to a block of data in the memory and also results in higher overall utilization of the memory system as
a whole.
8.If k bits are allotted for selecting the bank as shown in the image, there have to be total 2k banks. This ensures that there are no gaps of non-existent memory locations.
ii. Associative memory :
1.Associative memory is a memory in which location is accessed by a field of data word stored in the memory rather than by any address.
2.It can be viewed as a random access type memory which in addition to having a physically wired-in addressing mechanism also has
wired-in logic for bit comparison.
3.This logic circuit enables comparison of desired bit positions of all the words with a specified input key.
4.This comparison is done simultaneously for all the words. This is also called Content Addressable Memory (CAM).
Working principle of associative memory :
1.The mask register specifies the key field.
2. Input data is simultaneously compared with the key field of each word.
3.The select circuit implements two functions :
a. It stores the word location (s) for which match has occurred.
b. It reads out the word(s) in predetermined order for the match position (s).
4.Thus, a word stored in the associative memory is a pair (key, Data). Any subfield of the word can be specified as the key.
5.The read or write instruction is preceded by the match instruction having the format. Match key, Input data
6.The read/write operation can next be performed on each of the words for which match signal is generated.
